Lead frames are typically used during semiconductor packaging to serve as an electrical interconnect between semiconductor dies of semiconductor packages and external circuitries. Lead frames are also commonly used in the fabrication of semiconductor packages because they provide an efficient form of heat dissipation. Semiconductor packaging first involves dicing a semiconductor wafer to separate semiconductor dies on the semiconductor wafer. After dicing of the semiconductor wafer has been completed, the semiconductor dies are then individually attached to respective die pads of the lead frame via die bonding, and thereafter, electrical connections are formed between each semiconductor die and the respective leads of the lead frame via wire bonding using fine wires. Subsequently, the lead frame is encased within a mold to encapsulate each of the semiconductor dies with an encapsulant (e.g. epoxy resin) by injection molding or compression molding.
With the dual impact of increasing miniaturisation and processing capability among modern day electronic packages, there is now an ever-greater demand for semiconductor packaging processes and/or tools to achieve a higher density of electrical connections between semiconductor dies and lead frames compared with conventional methods and devices, in order to reduce the form factor or size of electronic packages. This has resulted in the introduction of new semiconductor package structures and methods of fabrication thereof in the back-end semiconductor industry.
For instance, US 2011/0267789 proposes a semiconductor package structure and a method of fabrication thereof, which is illustrated in FIGS. 1a to 1d. FIG. 1a shows a first metal layer 120 and a second metal layer 130 that are formed on a conductive carrier 110 by electrolytic plating. Specifically, it can be seen from FIG. 1a that the first metal layer 120 forms a plurality of lead pads 121 and a die-attach pad 122, while the second metal layer 130 forms a plurality of bond pads 131 and die-attach barriers 132. FIG. 1b shows that whilst the first and second metal layers 120, 130 are being supported on the conductive carrier 110, a semiconductor die 160 is bonded to the die-attach pad 122 and electrical interconnections are formed between the semiconductor die 160 and the bond pads 131. The first and second metal layers 120, 130 and the semiconductor die 160 are then encapsulated by an encapsulation layer 170 as shown in FIG. 1c, and the conductive carrier 110 is thereafter removed from the semiconductor package structure as shown in FIG. 1d. 
By providing the conductive carrier 110 to support the first and second metal layers 120, 130, the separation between the bond pads 131 and the die-attach barriers 132 may be reduced to increase the density of electrical interconnections between the semiconductor die 160 and the bond pads 131. However, one limitation of the approach used in US 2011/0267789 is the need to remove the conductive carrier 110 by chemical etching after the encapsulation layer 170 has been formed. Accordingly, the step of removing the conductive carrier 110 presents an additional process in the fabrication that may increase the complexity and costs of fabricating the semiconductor package structure.
Thus, it is an object of the present invention to seek to propose a lead frame as well as a method of fabrication thereof that at least ameliorates the limitation of US 2011/0267789 as described, and to provide the general public with a useful choice.